Etch and deposition from first principles
Sculpting in atoms.
Lithography only draws. Everything a chip is actually made of is cut away by etch or laid down by deposition, often a few atoms at a time.
The block turning here is a slice of 3D NAND flash: a stack of layers with holes etched straight through it, hundreds of millions of them on a single chip. By the end of this page you will know how those holes get there.
01 The loop
Draw, cut, fill, flatten.
Every layer of a chip is made with four verbs. Lithography draws a stencil. Etch cuts through it. Deposition fills what was cut. Polishing makes it flat for the next round. Here is one copper wiring layer, start to finish.
02 Direction
Why chips are etched with plasma.
Dip a wafer in acid and it eats in every direction at once. It cuts sideways under the stencil as fast as it cuts down. That was fine when lines were microns wide. At 40 nm the undercut alone can erase a line.
A plasma can do what a liquid cannot: throw ions straight down. Red dots are ions, green dots are neutral radicals that drift everywhere.
03 Inside the tool
A lightning storm in a can.
An etch chamber is a vacuum vessel with a slow stream of carefully chosen gas flowing through it. A radio-frequency coil on top strips electrons off that gas and lights a plasma: a glowing soup of ions, electrons and highly reactive fragments called radicals.
A second RF supply biases the wafer. That creates a thin dark layer just above it, the sheath, where the electric field grabs positive ions and fires them straight down.
Two knobs, two jobs. Source power sets how dense the plasma is, so how many ions and radicals exist. Bias power sets how hard and how straight the ions hit. Being able to turn them separately is what makes modern etch controllable.
04 Chemistry and momentum
Ions dig, radicals react, walls protect.
Ions alone would sputter slowly. Radicals alone would etch in all directions. Together they are fast and directional: radicals soften the surface, and ions knock the products off, mostly at the bottom where they land.
The trick that keeps the walls straight is a third ingredient. The gas mix also deposits a thin polymer film. Ions blast it off the floor, but on the walls it survives and shields them.
Grey dots are etch products leaving the trench. The deeper the trench, the harder it is for them to get out, and for fresh ions and radicals to get in.
05 3D NAND
The deepest holes in industry.
Flash memory stopped shrinking sideways and started stacking. Hundreds of alternating layers of oxide and nitride are laid down, then a channel hole about 100 nm wide is etched through all of them in one go.
At 128 layers that hole is already 5 to 6 µm deep, an aspect ratio of 50 to 60 to 1, according to Lam Research. Today's stacks are much taller, so makers etch them in decks and stack the decks.
SK hynix has mass-produced 321-layer NAND since November 2024. Samsung runs 286 layers and has a 400-layer class generation scheduled for the second half of 2026. Lam Research's cryogenic etch runs below 0 °C, where the chemistry stays directional for longer. Depth here scales with an average layer pitch, so treat it as an estimate.
06 Atomic layer deposition
One layer, then stop.
Atomic layer deposition splits one chemical reaction into two halves and never lets them meet in the gas. Precursor A sticks to every free spot on the surface and then can stick to nothing else. Purge. Precursor B reacts with what A left behind and resets the surface. Purge. One layer, roughly 1 Å thick.
Because each half-reaction stops by itself, the film grows the same everywhere the gas can reach. Compare the three ways of coating a deep trench:
07 Where to go next
Cut, fill, repeat.
Every layer of a chip passes through this loop: draw, cut, fill, flatten. A leading-edge chip does it dozens of times, in a building designed around doing it without a speck of dust.
- Writing with light: how a lithography scanner draws the stencil
- The impossible machine: why a scanner is fast and exact at once
- Anatomy of a fab: the building all of this happens in
- Chips on chips: HBM and advanced packaging
- Wrapping the gate: how the transistor went 3D
Every figure comes from a publisher named below. Scenes are illustrations, not to scale unless a readout says so. Figures are rounded.