Sculpting in atoms
Lithography only draws. Almost everything a chip is made of is cut away by etch or laid down by deposition, sometimes a few atomic layers at a time.
The block turning here is a piece of 3D NAND flash memory, cut open: a stack of layers with channels etched straight through it. A one-terabit, 321-layer chip from SK hynix holds at least about 1 billion of these channels, by our arithmetic. By the end of this page you will know how they get there.
Draw, cut, fill, flatten.
Many of a chip's layers are made with four verbs. Lithography draws a stencil. Etch cuts through it. Deposition fills what was cut. Polishing makes it flat for the next round. Here is one copper wiring layer, start to finish.
Lithography has printed a stencil in resist on top of the oxide film.
Etch: a plasma removes the film wherever the resist is open, and has to stop at the layer below without eating into it.
Strip: the resist is burned off in an oxygen plasma. The pattern now lives in the film itself.
Liner: a thin barrier of tantalum goes down first, so the copper cannot creep into the oxide.
Fill: copper is electroplated over everything, filling the trenches and covering the top.
Polish: a turning pad with a slurry of chemicals and abrasives grinds the excess away, leaving copper only in the trenches. One wiring layer done.
Why chips are etched with plasma.
Dip a wafer in a chemical bath and it eats in every direction at once, sideways under the stencil as fast as down. SK hynix writes that this already struggled with 5 µm features in the early 1970s, which is why plasma etching was developed. E. Chen's Harvard course slides (2004) put the limit plainly: a wet etch cannot make a pattern smaller than the film is thick. By our arithmetic, through a film 20 nm thick a 40 nm line is undercut from both sides and gone.
A plasma can do what a liquid cannot: throw ions straight down. Red dots are ions, which carry a charge. Green dots are radicals, which are neutral and drift everywhere.
A lightning storm in a can.
An etch chamber is a vacuum vessel with a slow stream of carefully chosen gas flowing through it. Radio-frequency power strips electrons off the gas and lights a plasma: a glowing mix of ions, electrons and highly reactive fragments called radicals.
A second supply biases the wafer. Just above it forms the sheath, a thin layer that glows less than the plasma, where the electric field grabs positive ions and fires them straight down.
A coil above a ceramic window: the coil stays outside the vacuum and lights the plasma through the window, and the gas comes in through the window's middle, at 1 to 10 millitorr. Lam Research builds its conductor etchers this way.
A showerhead: the gas comes in through the holes of the upper plate, which is also an electrode, and power between it and the chuck lights the plasma, at 30 to 300 millitorr. Lam Research builds its dielectric etchers this way: a thinner plasma, more energetic ions.
Two knobs, two jobs: source power sets how dense the plasma is, bias power how hard the ions hit the wafer, and the harder they hit, the straighter the etch.
Ions dig, radicals react, walls protect.
Ions alone barely etch: they only knock atoms loose. Radicals alone etch slowly, and in every direction. Together they are fast and directional: Lieberman (Berkeley) shows silicon etching about 10 times faster when argon ions join the chemistry, and Lam's Kanarik and others credit the idea to Coburn and Winters, 1979. Radicals settle on the surface, and ions knock the products off, mostly at the bottom where they land.
What keeps the walls straight is a third ingredient. The gas mix also lays down a thin polymer film. Ions clear it off the floor, but the walls, which they hardly hit, keep it, and it shields them. Ling Xie showed it in a Harvard nanofabrication summer school talk (2014): polymer on the walls, none on the floor.
Grey dots are etch products leaving the trench. The deeper it gets, the harder it is for them to get out and for fresh ions and radicals to get in, so the etch slows: aspect-ratio dependent etching. Without the wall film the walls can bow outward; too little film is one of several causes.
Holes fifty to a hundred times deeper than wide.
Flash memory stopped shrinking sideways and started stacking: hundreds of layers of oxide and nitride, with a channel hole about 100 nm wide etched through them. Semiconductor Digest gives such a hole, at 128 layers, as 5 to 6 µm deep: 50 to 60 to 1. Tokyo Electron's own etch reaches 10 µm, for over 400 layers.
Taller stacks are etched in decks: two in Samsung's previous generation, three in SK hynix's 321 layers. A red blood cell lies beside the stack, at the same scale.
Each maker's own count: Kioxia and SanDisk sample 332 layers (2026); Micron made 232 in 2022; Samsung unveiled more than 400 (2026); SK hynix has made 321 since 2024. Lam Research etches such holes below 0 °C, which limits sideways etching.
Half a reaction, then stop.
Atomic layer deposition splits one reaction into two halves that never meet in the gas. Pulse A: TMA, trimethylaluminium, sticks to every free site, then to nothing more. Purge. Pulse B: water reacts with what TMA left, gives off methane and leaves fresh sites. Purge. Each cycle adds about 1.0 Å of aluminium oxide: not exactly a single atomic layer, in Lam's words.
On the University of Pennsylvania's tool at 200 °C a pulse lasts 0.015 s and a purge 8 s, about 16 s a cycle: the timeline above is to scale for neither. Each half stops by itself, so the film grows the same wherever the gas reaches. Three ways to coat a trench:
Sputtering coats the walls poorly and overhangs the mouth of the trench.
Chemical vapour deposition coats every surface, but in deep, narrow holes its coverage varies.
ALD lays down the same thin film each cycle on the top, the walls and the floor of a feature.
Cut, fill, repeat.
Many of a chip's layers pass through this loop: draw, cut, fill, flatten. Nikon lists its steps from coating the resist through exposure, development, etch and doping, and writes that they are repeated several tens of times.
Etch and deposition tool makers cited on this page: AMEC, Applied Materials, ASM International, Kokusai Electric, Lam Research, Naura and Tokyo Electron. 3D NAND makers cited on this page: Kioxia, Micron, Samsung, SanDisk and SK hynix.
- Writing with lighthow a lithography scanner draws the stencil03
- The impossible machinewhy a scanner is fast and exact at once04
- Anatomy of a fabthe building all of this happens in02
- Wrapping the gatehow the transistor went 3D06
- Chips on chipsHBM and advanced packaging09