From switch to software
Every app on your phone runs on billions of tiny switches, each either on or off. This page climbs from one switch to a running program, one rung at a time.
A switch with no moving parts.
A transistor of this kind has a source, a drain and a gate, and a fourth terminal, the body (the bulk, in MIT's course), that this page leaves aside. A voltage on the gate pulls a thin layer of electrons up under it, the channel, and the channel joins source and drain: current flows, and the lamp lights. Take the voltage away and the channel goes.
MIT's course puts it in one line: the transistor works as a voltage-controlled switch between source and drain.
Switches that decide.
Wire switches together and they compute. Chips pair two kinds: a p-type that conducts when its gate is 0, and an n-type that conducts when its gate is 1. The p-types join the output to power, the n-types join it to ground, and when one side conducts the other does not. Two transistors make a NOT gate; four make a NAND, whose output is 0 only when both inputs are 1.
NAND alone is enough: any logic function can be built from NAND gates, and MIT's course calls it a universal gate. The Nand to Tetris course builds a working computer from NAND gates and one storage element, a flip-flop, that it takes as given.
Gates that add.
A full adder adds three bits, one from each number and a carry, and gives a sum bit and a carry for the next one. Chain 4 of them and you can add any two numbers from 0 to 15. Each board is one full adder, its 28 transistors lit where their gates switch them on: the input lamps on top, the sum lamp below.
Move A or B and the carry runs from right to left, one adder at a time, and the sum lamps are wrong until it arrives. In a chain like this the wait grows with the number of bits.
Apple's platforms follow the 64-bit ARM specification apart from a few differences, in Apple's words, and Arm's registers hold 64 bits: 16 times this adder's width (our arithmetic). Courses teach faster designs, such as carry-lookahead, that cut the wait for the carry.
Six switches to hold one bit.
A computer also has to remember. Cache memory on the chip holds each bit in SRAM: 6 transistors, two inverters in a loop that keeps itself on. Main memory holds each bit in DRAM, as charge in a capacitor behind one transistor. MIT's course puts a DRAM cell at about 20 times less area a bit, but the charge leaks, and every cell must be read and written back, a refresh.
Write a bit into both cells. Then switch refresh off and watch the DRAM cell forget.
Micron's datasheet for an 8 Gb DDR4 chip requires 8,192 refresh commands within 64 ms, up to 85 °C. Here the leak and the refresh are drawn many times slower.
A program is just more bits.
Software is a list of instructions, each a pattern of bits. RISC-V, an open standard, fixes each of its base instructions at 32 bits. This one, add x1, x2, x3, tells the processor to add two of its registers, x2 and x3, which hold the A and B you set above, and to put the answer in a third, x1. Tall cells are 1s.
The fields say what to do: opcode, funct3 and funct7 pick the operation, rs1 and rs2 name the registers read, rd the one written. Pick another operation and only those bits change.
Fetch: the processor reads the 32-bit word from memory.
Decode: its fields are split out. They name the operation and the registers, which are read.
Execute: the arithmetic logic unit, the ALU, combines x2 and x3.
Write back: the result lands in x1. The next instruction is fetched.
Berkeley's CS 61C names five steps for a RISC-V instruction; the fourth, memory access, loads or stores data, which an add does not, so it is left out here. Apple's iPhones and Macs run Arm's instructions instead, and Arm calls its A64 set fixed-length, 32 bits.
Billions of the same trick.
Every rung of this page is built from the one below: adders and memory from gates, gates from switches. A chip runs programs with a great many of them.
Intel's 4004 of 1971, a 4-bit processor that Intel calls the world's first electronically programmable microprocessor, had 2,300 transistors. Apple's M1 had 16 billion in 2020; the M4 has 28 billion. The M3 Ultra joins two M3 Max dies into 184 billion.
On a true scale the M3 Ultra sets the height and every bar is in proportion; every bar up to the 4004 would be far thinner than a pixel, and is drawn as a hairline.
Now make it fast.
This page climbed from one switch to one instruction. The next one asks how often the switches switch.
Companies on this record that the page names: Apple, Arm, Intel and Micron.
- A billion ticks a secondclock speed, cores and the inside of a chip18
- Wrapping the gatewhat the switch looks like today06
- What “2 nm” meanshow small the switches really are07