The chip at work speed
A billion ticks a second.
A chip runs to a beat. Every tick, its switches settle into a new pattern. A 4 GHz chip ticks four billion times a second, and a phone still does far more than four billion things.
This page is about that beat: how short a tick is, why ticks stopped getting shorter, and how chips got faster anyway. Scroll to go on.
Arithmetic; Wikipedia on clock rate and Dennard scaling; Apple Newsroom, May 2024.
01 The clock
How long is a tick?
The clock is a signal that flips between 0 and 1 at a steady rate, and every part of the chip moves in step with it. At 1 GHz, a billion ticks a second, each tick lasts one nanosecond. In that time, light itself travels only 30 cm.
Arithmetic from the speed of light, 299,792,458 m/s. Signals in a chip's wires are much slower than light: at 7 nm and below, "the interconnect delay has become dominant over gate delay," as a Keysight engineer told Semiconductor Engineering (2026). So everything that must happen within one tick has to sit close together.
02 2005
The ticks stopped speeding up.
For decades, each new chip had a faster clock. Intel's Pentium 4 reached 3 GHz in 2002 and 3.8 GHz in 2004. Then it stopped: Intel cancelled its 4 GHz Pentium 4 in favour of dual-core chips. Faster ticks had become too hot to cool.
Twenty years later, Apple's M4 runs at about 4.4 GHz. The clock barely moved. Everything else did.
Wikipedia (Pentium 4, Dennard scaling); The Register (2004). Herb Sutter in March 2005: "CPU performance growth as we have known it hit a wall two years ago." Apple does not publish the M4's clock; 4.41 GHz is from a Geekbench listing.
03 Doing more per tick
Eight lanes, not one.
If the ticks can't come faster, do more in each. A modern core reads several instructions at once and runs them side by side in separate units. Apple's M1 performance cores decode eight instructions per tick.
The eight-wide decoder is Chips and Cheese's figure for the M1's Firestorm cores (2024). Apple has not published the M4's width. The readout is a theoretical peak, arithmetic: lanes times ticks.
04 Doing more at once
Ten cores, and helpers.
The second answer to the wall: more cores. Apple's M4 has four performance cores and six efficiency cores, each running its own stream of instructions. Set the numbers and see the peak.
The third answer is specialised blocks. The M4's Neural Engine does "up to 38 trillion operations per second" (Apple), hundreds of times the CPU's peak, because it does one kind of maths, massively in parallel. The comparison is not like for like: an operation is not an instruction. The CPU figure is arithmetic on your inputs.
05 System on a chip
One die, many blocks.
An Apple chip is a system on a chip: CPU cores, graphics, the Neural Engine, caches and memory links, all on one piece of silicon, sharing one pool of memory. That is not the same as chiplets. Chiplets are separate dies in one package, like the AI chips in Chips on chips.
Apple's biggest desktop chips do both. The M3 Ultra joins two M3 Max dies over "10,000 high-speed connections".
Apple Newsroom (May and October 2024, March 2025). The layout is schematic, not Apple's floor plan, which Apple does not publish.
06 Where to go next
Faster by doing more.
Since about 2005, chips have not got faster by ticking faster. They got faster by doing more per tick, in more places at once, with more transistors. That is why every new node still matters.
- From switch to software: what each tick actually switches
- Chips on chips: chiplets and packaging
- What "2 nm" means: where the extra transistors come from