Silicon Almanac.All explainers
Drag the scene to turn it · scroll to continue

The supply chain one chip, many countries

Where a chip gets made.

No country makes a chip on its own. Design, software, wafers, tools, fabs and packaging each sit somewhere different, and a chip visits most of them.

This page splits the work into eight kinds, shows who does each, then follows one chip around the world. Scroll to go on. Drag the globe to turn it.

70+border crossings a chip may make
50+points where one region holds over 65%
92%of sub-10 nm capacity in Taiwan, 2019

From GSA and Accenture (2020) and SIA and BCG (2021). All three figures are named again where they are used.

01 Value added

Eight kinds of work.

Georgetown's CSET split the industry's value added into eight segments. Two dominate: designing chips, and making them in fabs. Together they are over two thirds of the whole. Some of the thinnest slices matter most, because nobody else can supply them.

Shares of value added from CSET, "The Semiconductor Supply Chain", January 2021, Table 1, built on 2019 data. Slab height is share.

02 By headquarters

Who does what.

Pick a segment and the globe shows where the companies that do it are headquartered. The US leads overall on the strength of design and software. Japan leads in wafers and packaging tools. Even in fabrication, US firms lead by headquarters, with Korea and Taiwan close behind; Taiwan leads in packaging and test.

Largest share-
Bar heightshare of that segment

CSET counts a company where it is headquartered, not where its factories are. A US firm's fab in Asia counts as American. "Other" is the rest of the world, pinned on Southeast Asia for display. Shares under 2% are drawn but not labelled.

03 An illustrative route

Around the world in six stops.

Follow one phone processor. The route is made up but plausible; it is not any company's actual chain. Real chains are messier: GSA and Accenture found a chip could cross international borders about 70 times or more before it reaches the final customer.

Stop1 / 6
Fab cycle time~12 weeks

Cycle times from SIA and BCG (2021): about 12 weeks on average, 14 to 20 weeks for advanced processes. Malaysia holds about 13% of the world's assembly, packaging and test market, per its investment agency MIDA.

04 Single points of failure

Fifty-odd chokepoints.

SIA and BCG counted more than 50 points in the chain where one region holds more than 65% of the world market. Five of the best known:

Each figure is from the publisher named in its caption. They measure different things, in different years: firm headquarters, capacity location, market share. They are not directly comparable.

05 Subsidies and new fabs

Redrawing the map.

Governments are paying to move the map. SIA and BCG project that the US will go from none of the world's advanced logic capacity (below 10 nm) in 2022 to 28% by 2032. BCG also expects packaging and test to spread from China and Taiwan to Southeast Asia, Latin America and Eastern Europe.

US share, advanced logic0%
Statusa projection, not a fact

SIA press release, 8 May 2024, on the SIA/BCG report "Emerging Resilience in the Semiconductor Supply Chain".

06 Where to go next

Every stop has a story.

The other explainers zoom into the stops on this trip.

Land outline from Natural Earth. The globe's anchor points stand for whole regions.