Pouring the slab
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Fab investment · Explainer 11

What a fab buys

A state-of-the-art fab for advanced logic or memory costs about $20 billion to build, by SIA and BCG's count. About half of that buys machines, and TSMC writes its machines off over 5 years.

$5 to 20 bnto build one fab, SIA/BCG
About 50%of it on equipment
5 yearsTSMC's write-off for machinery
Scene: a drawn fab, not any company's, with 1,248 drawn machines. Its floor has the area Micron said each of up to four cleanrooms at its New York site could eventually have (October 2022), about 55,700 m² by our conversion, and gives each tool segment space in proportion to its 2025 sales. Costs: SIA and BCG (2020). Write-off: TSMC (2026). Sources at the end.
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01 · The split

Half is machines.

SIA and BCG put a state-of-the-art fab at roughly $5 billion (advanced analogue) to $20 billion (advanced logic and memory). "About half" goes to manufacturing equipment and 20% to 40% to construction; everything else is our remainder.

Here those sums stand as $100 notes on skids, $64 million to a skid as the US Bureau of Engraving and Printing packs them. The equipment of a $20 billion fab is 156 skids, about 100 tonnes of notes.

Equipment
$10.0 bn
Construction
$6.0 bn
Everything else
$4.0 bn
Over ten years
$30 to 40 bn
SIA and BCG (September 2020), for a fab of standard capacity, land, building and equipment included. Over ten years: their gross cost of ownership before incentives, $11 to 15 bn for advanced analogue and $30 to 40 bn for advanced logic or memory. Skids, and a note's weight of about a gram: US Bureau of Engraving and Printing; counts and tonnes are our arithmetic. BEP gives no skid's size, so each is drawn as a 1 m block.
02 · Wafer fab equipment

Which machines.

Sales of wafer fab equipment came to $116.9 billion in 2025, by SEMI's count. Of CSET's eight segments lithography is the largest; etch and clean plus deposition, by our sum, are larger still. The floor gives each segment its share of sales as space; it is not how a fab lays out its machines.

The machines that print each layer's pattern on the wafer: Writing with light. Makers CSET lists with a page on this record: ASML, Canon and Tokyo Electron.

Plasma etchers, and the tools that clean wafers between steps: Sculpting in atoms. Makers CSET lists: AMEC, Applied Materials, Lam Research, NAURA, Screen and Tokyo Electron.

The tools that lay down the thin films a chip is built from: Sculpting in atoms. Makers CSET lists: Applied Materials, ASM International, Kokusai Electric, Lam Research, NAURA, Tokyo Electron and Veeco.

Inspection and metrology, the tools that measure what the others did: Finding the defect. Makers CSET lists: Applied Materials, ASML, Camtek, KLA, Nova and Onto Innovation.

Implanters fire dopant atoms into the silicon to set how it conducts. Makers CSET lists: Applied Materials and Axcelis.

The track that coats, bakes and develops the resist round each exposure. Makers CSET lists: Lam Research, Screen and Tokyo Electron.

Chemical-mechanical polishing flattens each layer before the next. Makers CSET lists: Applied Materials and Ebara.

CSET groups wafer handlers with photomask handlers, which together "store and transport wafers and photomasks in a fab": here the stockers and the vehicles on the overhead rail. No maker is named for this segment.

Sales in 2025
$32.6 bn
Share of the eight
28%
Sales by segment: CSET's Supply Chain Explorer, its analysis of TechInsights data published 3 July 2026; makers as CSET lists them, without its shares. SEMI on PR Newswire (July 2026). The floor: the 600,000 square feet Micron said each of its New York cleanrooms could eventually have (October 2022), drawn 300 by 186 m in 8 bays; the machines are generic, the scanners drawn at the size Canon gives for the main body of its FPA-6300ES6a, 2.30 by 5.16 m and 2.90 m tall. Shares of the eight are our arithmetic; SEMI counts its own way, so the eight need not add up to its total.
03 · Writing it off

Every wafer pays rent.

A fab's machines lose value on its books over a few years, and each year's loss is a cost of every wafer made that year. TSMC writes machinery off over 5 years and buildings over 10 to 20; Intel moved certain production machinery from 5 years to 8 in January 2023.

Per year, early
$2.50 bn
Per wafer, early
$5,952
Per wafer, paid off
$1,190
Our arithmetic on your inputs: straight-line at full output, the building and the rest over 20 years by our assumption, the same sum each year whether a machine runs or not. Each block is a $64 million skid, drawn. TSMC, 2025 financial statements; Intel, first-quarter 2023 results; 35,000 wafers a month is SIA and BCG's reference logic fab. By our arithmetic TSMC's 2025 depreciation was 17.8% of its net revenue; CSET's model (April 2020) used its 2004 to 2018 average, 24.93%.
04 · Announced projects

The price tags.

Each project stands at the amount its company, or a government agency, stated. TSMC's Arizona page puts its investment there at $265 billion, "expanded from $12 billion"; current plans include six logic fabs, two advanced packaging facilities and an R&D centre. Micron plans up to four fabs in New York for $100 billion over 20-plus years. Intel put two in Magdeburg at more than €30 billion in June 2023, and said in July 2025 it would no longer move forward: an outline here. Euro sums stand at their dollar value at the European Central Bank's 2023 average rate, by our arithmetic.

Governments pay part: the European Commission says the EU Chips Act should result in public investments of more than €43 billion, and NIST dedicates $39 billion of US CHIPS funding to incentives for facilities and equipment.

On this record's fab map: TSMC Arizona, Micron New York, Samsung Taylor, JASM Kumamoto, ESMC Dresden and Intel Magdeburg.

Announced amounts span many years and are not comparable one to one. BEP skids, 10 by 10 a layer; euro sums at the ECB's 2023 average, 1.0816 dollars a euro, as this record holds it (our arithmetic). TSMC (Arizona page, read September 2026; JASM, February 2024; ESMC, August 2024); Micron (2026, 2022); NIST, Samsung's final CHIPS award: over $37 billion in Taylor and Austin (Samsung put Taylor at $17 billion in 2021); Intel (2023, 2025); European Commission; NIST.
05 · Where to go next

Money into machines.

The four largest segments on that floor have an explainer of their own.

Chipmakers named on this page, and on this record: Intel, Micron, Samsung Electronics and TSMC, with Sony Semiconductor Solutions in JASM and Bosch, Infineon and NXP in ESMC. Where the fabs are: the fab map.

The building, its bays and its machines are drawn, not any company's fab; the tool makers are named in chapter 02.